1. Field of the Invention
The present invention relates generally to a color video display apparatus, and more particularly to a color video display apparatus which is well suited for displaying a picture in which a given image can be superimposed on a natural image displayed with fine gradation.
2. Prior Art
A typical form of color display has heretofore been well known in which a VRAM (video RAM) is arranged to store R (red), G (green) and B (blue) color data in correspondence with each dot of an image to be displayed, such color data being read out and converted into R, G and B color video signals and outputted to a CRT display unit.
In general, a natural image must be displayed with fine gradation. However, in order to achieve such fine gradation image display, the number of bits corresponding to the respective R, G and B color data, which represent a color of one display dot, must be at least 4 to 8 for each data, that is, 12 to 24 bits in total for each display dot. If the number of bits corresponding to each color data is increased, the capacity of the VRAM must also be increased. To solve this problem, if the VRAM is arranged to store luminance data Dy and color difference data Du and Dv instead of the R, G and B color data, the capacity of the VRAM can be reduced approximately to a half as compared with the case where the color data are stored. As is well known, if the R, G and B color data are represented respectively by Dr, Dg and Db, the luminance data Dy and the color difference data Du and Dv can be calculated by the following equations: ##EQU1##
If the VRAM is arranged to store the aforementioned luminance data Dy and the color difference data Du and Dv instead of the color data, the capacity of the VRAM can be reduced. The reason why such reduction can be achieved is as follows. The human eye generally has a characteristic that a color of an image can not be identified when an area of the image become sufficiently small. Therefore, when a color image is to be displayed, data representative of color differences of dots of the color image can be outputted at a low speed. In this case, although the luminance data Dy need be provided for each dot of the color image, the color difference data Du and Dv need not be provided for each dot. For example, it is sufficient to provide a single averaged color difference data for each series of four dots. More specifically, if the data Dy, Du and Dv are constituted respectively by four bits, the capacity of the VRAM required to display four dots is equivalent to 24 bits as shown in FIG. 1-(a). In FIG. 1-(a), the data Dy is stored along the vertical axis, while the data Du and Dv are stored along the horizontal axis. In contrast, if the color data Dr, Dg and Db are constituted respectively by four bits, 48 bits are needed to display a set of four dots, as shown in FIG. 1-(b).
Thus, it is possible to significantly reduce the storage capacity of the VRAM by storing display data corresponding to each display dot in the form of the luminance data Dy and the color difference data Du and Dv. In this case, however, one problem arises in connection with the displaying of superimposed images. More specifically, in the field of computer graphics, there are cases where a first image is used as a background image and a second image is superimposed on the first image, such combined image being displayed on a screen. In this case, if the first image is stored in the form of R, G and B color data, the second image can be superimposed on the first image by merely rewriting those color data in the VRAM which correspond to the second image, since each display dot directly corresponds to a respective one of the color data stored in the VRAM. However, in the case where the first image is stored in a compressed manner using the luminance and color difference data, a set of color difference data are stored in correspondence with each group of a plurality of display dots, and this makes it difficult to rewrite the color difference data on a one-display-dot unit basis. More specifically, the read/write control of data with respect to the VRAM in the case where the color data are used is different from that in the case where the luminance data and the color difference data are used. With the prior art circuit arrangements, it has therefore been difficult to store those different data in a mixed manner. In this case, although it is, of course, not very difficult to rewrite those data in a unit composed of a plurality of dots, such rewriting method lowers the resolution of the second image.
On the other hand, the following prior art construction is known as one construction which enables a second image to be superimposed on a first image which is stored in a compressed manner using the luminance and color difference data. In FIG. 2, the prior art construction includes a CPU (central processing unit) 1, a bus line 2, a display controller 3, a first VRAM 4, a converter 5, a selector 6, a second VRAM 7, a look-up table (LUT) 8 and a digital-to-analog converter (DAC) 9. Data representative of the first image is written into the first VRAM 4 in the form of the luminance and color difference data, and these data are sequentially read out of the VRAM 4 by the display controller 3, being converted into the R, G and B color data by the converter 5, and being outputted to the selector 6. A color code representative of the color of each dot constituting the second image is written into the second VRAM 7 in correspondence with each dot to be displayed, and "0"s are written into all areas except those corresponding to the second image within the VRAM 7. The contents of the VRAM 7 are sequentially read out in synchronism with the timings at which data are read from the VRAM 4, and are outputted to the look-up table 8. When the second VRAM 7 outputs the color code to the look-up table 8, the look-up table 8 converts this color code into the R, G and B color data, outputs them to the selector 6 and supplies a signal CS representative of "1" to the same. On the other hand, when the second VRAM 7 outputs a "0" to the look-up table 8, the look-up table 8 outputs the signal CS of "0" to the selector 6. When the signal CS is "1", the selector 6 outputs to the DAC 9 the color data supplied from the look-up table 8, whereas when the signal CS is "0", the selector 6 outputs to the DAC 9 the color data supplied from the converter 5. The DAC 9 converts the color data fed from the selector 6 into the R, G and B color video signals (in analog form) and supplies them to the CRT display unit (not shown).
With this arrangement, it is possible to freely superimpose one image on another by rewriting the color codes in the VRAM 7. This arrangement is, however, disadvantageous in that since the VRAM 7 must be provided additionally, the required memory capacity is significantly increased.